From 6094d5af4b98fcbc7064c5da7de41c2cb6bf7f3a Mon Sep 17 00:00:00 2001 From: fabian Date: Wed, 28 Jan 2026 21:16:48 +0000 Subject: [PATCH] initial Commit --- main.c | 111 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 111 insertions(+) create mode 100644 main.c diff --git a/main.c b/main.c new file mode 100644 index 0000000..01d87f5 --- /dev/null +++ b/main.c @@ -0,0 +1,111 @@ +#include +#include +#include +#include "nex_ui.h" + + +//---------------------Alias-Defines------------------------ + +#define BITBAND_PERI(a,b) ((PERIPH_BB_BASE + (a-PERIPH_BASE)*32 + (b*4))) + +#define FEHLER *((volatile unsigned long *)(BITBAND_PERI(GPIOC_ODR,1))) // V3 +#define LEERBLASEN *((volatile unsigned long *)(BITBAND_PERI(GPIOC_ODR,2))) // V4 +#define FEIN *((volatile unsigned long *)(BITBAND_PERI(GPIOC_ODR,13))) // V5 +#define GROB *((volatile unsigned long *)(BITBAND_PERI(GPIOB_ODR,7))) // V6 +#define PUMPE *((volatile unsigned long *)(BITBAND_PERI(GPIOB_ODR,6))) // V7 + +//---------------------------------------------------------- + +void SysTick_Handler() +{ + STD_IncTick(); +} + +void PortConfig(void) +{ + RCC -> APB2ENR |= RCC_APB2ENR_IOPCEN; //Takt für Port C aktivieren + RCC -> APB2ENR |= RCC_APB2ENR_IOPBEN; //Takt für Port B aktivieren + RCC -> APB2ENR |= RCC_APB2ENR_IOPAEN; //Takt für Port A aktivieren + + GPIOC -> CRL &= 0x00000000; + GPIOC -> CRL = 0x22222222; + GPIOC -> CRH = 0x22222222; + + GPIOB -> CRL &= 0x00000000; + GPIOB -> CRL = 0x22222222; + + GPIOA -> CRL &= 0x00000000; + GPIOA -> CRL = 0x22222222; +} + +void uart2_init(void) +{ + RCC->APB2ENR |= RCC_APB2ENR_AFIOEN | RCC_APB2ENR_IOPAEN; + RCC->APB1ENR |= 0x20000; // UART2 Taktversorgung + + GPIOA->CRL &= 0xFFFFF0FF; + GPIOA->CRL |= 0xB00; + + GPIOA->CRL &= 0xFFFF0FFF; + GPIOA->CRL |= 0x4000; + + USART2->CR1 &= ~0x1000; // M:--> Start bit, 8 Data bits, n Stop bit + USART2->CR1 &= ~0x0400; // PCE: 0: Parity control disabled + USART2->CR2 &= ~0x3000; // STOP: 00: 1 Stop bit afungsbil + USART2->BRR = 0x1D4C; // set Baudrate to 9600 Baud (SysClk 72Mhz) + USART2->CR1 |= 0x0C; // enable Receiver and Transmitter + USART2->CR1 |= 0x2000; // Set USART Enable Bit + +} + +void uart2_putChar(char zeichen) +{ + while(!((USART2->SR & 0x80) == 0x80)); + USART2->DR = zeichen; +} + +void uart2_putString(char* string) +{ + while(*string) + { + uart2_putChar(*string++); + } +} + +char uart2_getChar(void) +{ + while(!(USART2->SR & 0x20)); + return ((char) (USART2->DR & 0xFF)); +} + +int main(void) +{ + PortConfig(); + uart2_init(); + + Nex_Init(0); + Init_Nex_UI(); + + uart2_putString("Dosieranlage V01 "); + + while(1) + { + Nex_Event_Loop(nextlisten_list); // Touch Event ? + wait_sys_ms(1); + + FEHLER = 1; + LEERBLASEN = 1; + FEIN = 1; + GROB = 1; + PUMPE = 1; + + Nex_Event_Loop(nextlisten_list); + wait_sys_ms(1); + + FEHLER = 0; + LEERBLASEN = 0; + FEIN = 0; + GROB = 0; + PUMPE = 0; + } +}