DRM/DRM.c
2026-02-25 12:19:42 +01:00

72 lines
1.7 KiB
C

/*
Name: Schieder Fabian
Datum: 11.02.2026
Datei: DMA.c
Hardware: MDDS
Funktionsbeschreibung:
*/
#include "stm32f10x.h"
#include "armv40_frl.h"
double ADC_Volt;
char buffer[24];
volatile uint16_t adc_values[2]; // adc_values[0] = PA0, adc_values[1] = PA1
void adc_dma_init()
{
ADC1->SMPR2 = 0x0000002D; // Sample time ADC1 für channel 1 und channel 2
RCC->APB2ENR |= RCC_APB2ENR_ADC1EN; // Clock für ADC1
RCC->AHBENR |= RCC_AHBENR_DMA1EN; // Clock für DMA
/*------------------- DMA konfig -------------------*/
DMA1_Channel1->CPAR = (uint32_t)&ADC1->DR; // Peripheral Address
DMA1_Channel1->CMAR = (uint32_t)adc_values; // Memory Address
DMA1_Channel1->CNDTR = 2; // 2 Werte: Kanal0 und Kanal1
DMA1_Channel1->CCR =
DMA_CCR1_MINC // Memory increment
| DMA_CCR1_MSIZE_0 // Memory 16 bit
| DMA_CCR1_PSIZE_0 // Peripheral 16 bit
| DMA_CCR1_CIRC // Circular mode
| DMA_CCR1_PL_1 // Priority high
| DMA_CCR1_EN; // DMA Enable
/*------------------- ADC konfig -------------------*/
ADC1->CR1 = ADC_CR1_SCAN; // scan mode
ADC1->CR2 =
ADC_CR2_DMA
| ADC_CR2_CONT
| ADC_CR2_ADON;
ADC1->SQR1 |= 0x00100000; // 2 mal conversion item in regular sequence
ADC1->SQR2 |= 0x00000000;
ADC1->SQR3 |= 0x00000001; // Set channel 1 as 1st, channel 0 as 2nd
ADC1->CR2 |= ADC_CR2_ADON; // nochmal setzten startet die Wandlung des ADCs
}
int main(void)
{
uart3_init(9600);
RCC->APB2ENR |= RCC_APB2ENR_IOPAEN; // Clock für GPIOA
GPIOA->CRL &= 0xFFFFFF00;
adc_dma_init();
while(1)
{
}
}